Network chip design synthesis outlook Network-On-Chip Design and Synthesis Outlook

Network chip design synthesis outlook

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However, the development of application-specific NoCs for MPSoCs is a complex engineering process that involves the definition of suitable protocols and topologies of switches, and which demands adequate design flows to minimize design time and effort.

He received the D. To overcome these problems of scalability and complexity, Networks-On-Chip NoCs have been proposed as a promising replacement to eliminate many of the overheads of buses and MPSoCs connected by means of general-purpose communication architectures.

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In fact, the development of suitable high-level design and synthesis tools for NoC-based interconnects is a key element to benefit from NoC-based interconnect design in nanometer scale CMOS technologies.

Moreover, we show that it is currently feasible to synthesize in an automatic way a complete custom NoC interconnect from a high level specification in few hours.

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